TSMC described its next generation transistor technology this week at the IEEE International Electron Device Meeting (IEDM) in San Francisco. The N2, or 2-nanometer, technology is the semiconductor foundry giant’s first foray into a new transistor architecture, called nanosheet or gate-all-around.Samsung has a process for manufacturing similar devices, and both Intel and TSMC expect to be producing them in 2025.Compared to TSMC’s most advanced process today, N3 (3-nanometer), the new technology ...